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PIC16F753 数据表(PDF) 57 Page - Microchip Technology |
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PIC16F753 数据表(HTML) 57 Page - Microchip Technology |
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57 / 230 page ![]() 2013-2015 Microchip Technology Inc. DS40001709C-page 57 PIC16F753/HV753 7.0 TIMER1 MODULE WITH GATE CONTROL The Timer1 module is a 16-bit timer/counter with the following features: • 16-bit timer/counter register pair (TMR1H:TMR1L) • Selectable internal or external clock sources • 2-bit prescaler • Synchronous or asynchronous operation • Multiple Timer1 gate (count enable) sources • Interrupt on overflow • Wake-up on overflow (external clock, Asynchronous mode only) • Time base for the Capture/Compare function • Special Event Trigger (with CCP) • Selectable Gate Source Polarity • Gate Toggle mode • Gate Single-pulse mode • Gate Value Status • Gate Event Interrupt Figure 7-1 is a block diagram of the Timer1 module. FIGURE 7-1: TIMER1 BLOCK DIAGRAM Note 1: ST Buffer is high speed type when using T 1CKI. 2: Timer1 register increments on rising edge. 3: Synchronize does not operate while in Sleep . 00 11 10 01 T1G T0_overflow C1OUT_sync C2OUT_sync T1GSS<1:0> T1GPOL 0 1 Single Pulse Acq. Control 1 0 T1GSPM TMR1ON T1GTM TMR1GE TMR1ON D Q EN TMR1L TMR1H T1_overflow set flag bit TMR1IF TMR1 (2) 1 0 Fosc Internal Clock Fosc/4 Internal Clock LFINTOSC TMR1CS<1:0> 00 11 10 01 Prescaler 1,2,4,8 T1SYNC Sleep Input Fosc/2 Internal Clock T1CKPS<1:0> Synchronized Clock Input 2 det Synchronize (3) (1) D Q CK R Q T1GGO/DONE T1CLK T1CKI DQ set bit TMR1GIF T1GVAL Q1 det Interrupt |
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