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PIC16F753 数据表(PDF) 13 Page - Microchip Technology |
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PIC16F753 数据表(HTML) 13 Page - Microchip Technology |
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13 / 230 page  2013-2015 Microchip Technology Inc. DS40001709C-page 13 PIC16F753/HV753 TABLE 2-3: PIC16F753/HV753 SPECIAL REGISTERS SUMMARY BANK 2 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR/BOR Value on all other Resets Bank 2 100h INDF INDF<7:0> xxxx xxxx xxxx xxxx 101h TMR0 TMR0<7:0> xxxx xxxx uuuu uuuu 102h PCL PCL<7:0> 0000 0000 0000 0000 103h STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 000q quuu 104h FSR FSR<7:0> xxxx xxxx uuuu uuuu 105h LATA — —LATA5 LATA4 — LATA2 LATA1 LATA0 --xx -xxx --uu -uuu 106h — Unimplemented — — 107h LATC — — LATC5 LATC4 LATC3 LATC2 LATC1 LATC0 --xx xxxx --uu uuuu 108h IOCAN — — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 --00 0000 --00 0000 109h IOCCN — — IOCCN5 IOCCN4 IOCCN3 IOCCN2 IOCCN1 IOCCN0 --00 0000 --00 0000 10Ah PCLATH — — —PCLATH<4:0> ---0 0000 ---0 0000 10Bh INTCON GIE PEIE T0IE INTE IOCIE T0IF INTF IOCIF 0000 0000 0000 0000 10Ch WPUA — — WPUA5 WPUA4 WPUA3 WPUA2 WPUA1 WPUA0 --11 1111 --11 1111 10Dh WPUC — — WPUC5 WPUC4 WPUC3 WPUC2 WPUC1 WPUC0 --11 1111 --11 1111 10Eh SLRCONC — — SLRC5 SLRC4 — — — — --00 ---- --00 ---- 10Fh PCON — — — — — —POR BOR ---- --qq ---- --uu 110h TMR2 TMR2<7:0> 0000 0000 0000 0000 111h PR2 PR2<7:0> 1111 1111 1111 1111 112h T2CON — T2OUTPS<3:0> TMR2ON T2CKPS<1:0> -000 0000 -000 0000 113h HLTMR1 Holding Register for the 8-bit Hardware Limit Timer1 Count 0000 0000 0000 0000 114h HLTPR1 HLTMR1 Module Period Register 1111 1111 1111 1111 115h HLT1CON0 — H1OUTPS<3:0> H1ON H1CKPS<1:0> -000 0000 -000 0000 116h HLT1CON1 H1FES H1RES — H1ERS<2:0> H1FEREN H1REREN 11-0 0000 11-0 0000 117h HLTMR2 Holding Register for the 8-bit Hardware Limit Timer2 Count 0000 0000 0000 0000 118h HLTPR2 HLTMR2 Module Period Register 1111 1111 1111 1111 119h HLT2CON0 — H2OUTPS<3:0> H2ON H2CKPS<1:0> -000 0000 -000 0000 11Ah HLT2CON1 H2FES H2RES — H2ERS<2:0> H2FEREN H2REREN 11-0 0000 11-0 0000 11Bh — Unimplemented — — 11Ch — Unimplemented — — 11Dh — Unimplemented — — 11Eh SLPCCON0 SC1EN — — SC1POL SC1TSS<1:0> —SC1INS 0-00 00-0 0-00 00-0 11Fh SLPCCON1 — — — SC1RNG SC1ISET<3:0> ---0 0000 ---0 0000 Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition shaded = unimplemented. |
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