PIC16F753 datasheet(58/230 Pages) MICROCHIP

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PIC16F753/HV753

DS40001709C-page 58

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7.1

Timer1 Operation

The Timer1 module is a 16-bit incrementing counter

which is accessed through the TMR1H:TMR1L register

pair. Writes to TMR1H or TMR1L directly update the

counter.

When used with an internal clock source, the module is

a timer and increments on every instruction cycle.

When used with an external clock source, the module

can be used as either a timer or counter and

increments on every selected edge of the external

source.

Timer1 is enabled by configuring the TMR1ON and

TMR1GE bits in the T1CON and T1GCON registers,

respectively. Table 7-1 displays the Timer1 enable

selections.

7.2

Clock Source Selection

The TMR1CS<1:0> bits of the T1CON register are used

to select the clock source for Timer1. Table 7-2 displays

the clock source selections.

7.2.1

INTERNAL CLOCK SOURCE

When the internal clock source is selected, the

TMR1H:TMR1L register pair will increment on multiples

of FOSC or FOSC/4 as determined by the Timer1

prescaler.

7.2.2

EXTERNAL CLOCK SOURCE

When the external clock source is selected, the Timer1

module may work as a timer or a counter. When enabled

to count, Timer1 is incremented on the rising edge of the

external clock input T1CKI.

7.2.3

WDT OSCILLATOR

When the Watchdog is selected, Timer 1 will use the

LFINTOSC that is used to operate the Watchdog

Timer. This is the same oscillator as the LFINTOSC

used as the system clock. Selecting this option will

enable the oscillator even when the LFINTOSC or the

Watchdog are not in use. This oscillator will continue

to operate when in Sleep mode.

TABLE 7-1:

TIMER1 ENABLE

SELECTIONS

TMR1ON

TMR1GE

Timer1

Operation

Off

Always On

Count Enabled

TABLE 7-2:

CLOCK SOURCE

SELECTIONS

TMR1CS<1:0>

Clock Source

Temperature Sense Oscillator

External Clocking on T1CKI Pin

System Clock (FOSC)

Instruction Clock (FOSC/4)

Note:

In Counter mode, a falling edge must be

registered by the counter prior to the first

incrementing rising edge (see Figure 7-2)

after any one or more of the following

conditions:

• Timer1 enabled after POR Reset

• Write to TMR1H or TMR1L

• Timer1 is disabled

• Timer1 is disabled (TMR1ON = 0)

when T1CKI is high then Timer1 is

enabled (TMR1ON=1) when T1CKI is

low.

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