PIC16F753 datasheet(85/230 Pages) MICROCHIP

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DS40001709C-page 85

PIC16F753/HV753

11.2

Clock Sources

The COG_clock is used as the reference clock to the

various timers in the peripheral. Timers that use the

COG_clock include:

• Rising and falling dead-band time

• Rising and falling blanking time

• Rising and falling event phase delay

Clock sources available for selection include:

• 8 MHz HFINTOSC (active during Sleep)

• Instruction clock (Fosc/4)

• System clock (Fosc)

The clock source is selected with the GxCS<1:0> bits

of the COGxCON1 register (Register 11-2).

11.3

Selectable Event Sources

The COG uses any combination of independently

selectable

event

sources

generate

the

complementary waveform. Sources fall into two

categories:

• Rising event sources

• Falling event sources

The rising event sources are selected by setting bits in

the COGxRIS register (Register 11-3). The falling event

sources are selected by setting bits in the COGxFIS

together to generate the corresponding event signal.

Refer to Figure 11-2.

11.3.1

EDGE VS. LEVEL SENSING

Event input detection may be selected as level or

edge-sensitive. The Detection mode is individually select-

able for every source. Rising source detection modes are

selected with the COGxRSIM register (Register 11-4).

Falling source detection modes are selected with the

COGxFSIM register (Register 11-6). A set bit enables

edge detection for the corresponding event source. A

cleared bit enables level detection.

In general, events that are driven from a periodic source

should be edge-detected and events that are derived from

voltage thresholds at the target circuit should be

level-sensitive. Consider the following two examples:

The first example is an application in which the

period is determined by a 50% duty cycle clock

and the COG output duty cycle is determined by

a voltage level fed back through a comparator. If

the clock input is level sensitive, duty cycles less

than 50% will exhibit erratic operation.

The second example is similar to the first,

except that the duty cycle is close to 100%. The

feedback comparator high-to-low transition trips

the COG drive off, but almost immediately the

period source turns the drive back on. If the off

cycle is short enough, the comparator input may

not reach the low side of the hysteresis band

precluding an output change. The comparator

output stays low and without a high-to-low tran-

sition to trigger the edge sense, the drive of the

COG output will be stuck in a constant drive-on

condition. See Figure 11-7.

FIGURE 11-7:

EDGE VS. LEVEL SENSE

11.3.2

RISING EVENT

The rising event starts the PWM output active duty

cycle period. The rising event is the low-to-high

transition of the rising_event output. When the rising

event phase delay and dead-band time values are zero,

the COGxOUT0 output starts immediately. Otherwise,

the COGxOUT0 output is delayed. The rising event

source causes all the following actions:

• Start rising event phase delay counter (if enabled).

• Clear COGxOUT1 after phase delay.

• Start falling event input blanking (if enabled).

• Start dead-band delay (if enabled).

• Set COGxOUT0 output after dead-band delay

expires.

11.3.3

FALLING EVENT

The falling event terminates the PWM output active

duty cycle period. The falling event is the high-to-low

transition of the falling_event output. When the falling

event phase delay and dead-band time values are

zero, the COGxOUT1 output starts immediately.

Otherwise, the COGxOUT1 output is delayed. The

falling event source causes all the following actions:

• Start falling event phase delay counter (if enabled).

• Clear COGxOUT0.

• Start rising event input blanking (if enabled).

• Start falling event dead-band delay (if enabled).

• Set COGxOUT1 output after dead-band delay expires.

Rising (CCP1)

Falling (C1OUT)

C1IN-

COGOUT

hyst

Edge Sensitive

Rising (CCP1)

Falling (C1OUT)

C1IN-

COGOUT

hyst

Level Sensitive

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