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PIC16F753 数据表(PDF) 39 Page - Microchip Technology

部件名 PIC16F753
功能描述  14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers
PDF  230 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F753 数据表(HTML) 39 Page - Microchip Technology

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 2013-2015 Microchip Technology Inc.
DS40001709C-page 39
PIC16F753/HV753
5.0
I/O PORTS
Depending on the device selected and peripherals
enabled, there are up to two ports available. In general,
when a peripheral is enabled, that pin may not be used
as a general purpose I/O pin.
Each port has three standard registers for its operation.
These registers are:
• TRISx registers (data direction)
• PORTx registers (reads the levels on the pins of
the device)
• LATx registers (output latch)
Some ports may have one or more of the following
additional registers. These registers are:
• ANSELx (analog select)
• WPUx (weak pull-up)
• SLRCONx registers (slew rate)
The Data Latch (LATx registers) is useful for read-
modify-write operations on the values that the I/O pins
are driving.
A write operation to the LATx register has the same
affect as a write to the corresponding PORTx register.
A read of the LATx register reads the values held in the
I/O PORT latches, while a read of the PORTx register
reads the actual I/O pin value.
Ports with analog functions also have an ANSELx
register which can disable the digital input and save
power. A simplified model of a generic I/O port, without
the interfaces to other peripherals, is shown in
Figure 5-1.
FIGURE 5-1:
GENERIC I/O PORTA
OPERATION
EXAMPLE 5-1:
INITIALIZING PORTA
Q
D
CK
Write LATA
Data Register
I/O pin
Read PORTA
Write PORTA
TRISA
Read LATA
Data Bus
To peripherals
ANSELA
VDD
VSS
; This code example illustrates
; initializing the PORTA register. The
; other ports are initialized in the same
; manner.
BANKSEL
PORTA
;
CLRF
PORTA
;Init PORTA
BANKSEL
LATA
;Data Latch
CLRF
LATA
;
BANKSEL
ANSELA
;
CLRF
ANSELA
;digital I/O
BANKSEL
TRISA
;
MOVLW
B'00111000'
;Set RA<5:3> as inputs
MOVWF
TRISA
;and set RA<2:0> as
;outputs



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