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PIC16F753 数据表(PDF) 105 Page - Microchip Technology |
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PIC16F753 数据表(HTML) 105 Page - Microchip Technology |
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105 / 230 page ![]() 2013-2015 Microchip Technology Inc. DS40001709C-page 105 PIC16F753/HV753 12.1 ADC Configuration When configuring and using the ADC the following functions must be considered: • Port configuration • Channel selection • ADC voltage reference selection • ADC conversion clock source • Interrupt control • Results formatting 12.1.1 PORT CONFIGURATION The ADC can be used to convert both analog and digital signals. When converting analog signals, the I/O pin should be configured for analog by setting the associated TRIS and ANSEL bits. See the corresponding port section for more information. 12.1.2 CHANNEL SELECTION The CHS bits of the ADCON0 register determine which channel is connected to the sample and hold circuit. When changing channels, a delay is required before starting the next conversion. Refer to Section 12.2 “ADC Operation” for more information. 12.1.3 ADC VOLTAGE REFERENCE The ADPREF1 bit of the ADCON1 register provides control of the positive voltage reference. The positive voltage reference can be either VDD or an external voltage source. The negative voltage reference is always connected to the ground reference. 12.1.4 CONVERSION CLOCK The source of the conversion clock is software selectable via the ADCS bits of the ADCON1 register. There are seven possible clock options: •FOSC/2 •FOSC/4 •FOSC/8 •FOSC/16 •FOSC/32 •FOSC/64 •FRC (dedicated internal oscillator) The time to complete one bit conversion is defined as TAD. One full 10-bit conversion requires 11 TAD periods as shown in Figure 12-2. For correct conversion, the appropriate TAD specification must be met. See A/D conversion requirements in Section 22.0 “Electrical Specifications” for more information. Table 12-1 gives examples of appropriate ADC clock selections. Note: Analog voltages on any pin that is defined as a digital input may cause the input buffer to conduct excess current. Note: Unless using the FRC, any changes in the system clock frequency will change the ADC clock frequency, which may adversely affect the ADC result. |
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