PIC16F753 datasheet(117/230 Pages) MICROCHIP

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DS40001709C-page 117

PIC16F753/HV753

14.0

DIGITAL-TO-ANALOG

CONVERTER (DAC) MODULE

The Digital-to-Analog Converter supplies a variable

voltage reference, ratiometric with the input source,

with 512 selectable output levels.

The input of the DAC can be connected to:

•External VREF pins

•VDD supply voltage

• FVR (Fixed Voltage Reference)

The output of the DAC can be configured to supply a

reference voltage to the following:

• Comparator positive input

• ADC input channel

•DACXOUT pin

•Op amp

The Digital-to-Analog Converter (DAC) is enabled by

setting the DACEN bit of the DACxCON0 register.

14.1

Output Voltage Selection

The DAC has 512 voltage level ranges. The 512 levels

are set with the DACR<8:1> bits of the DACxREFH

The DAC output voltage is determined by Equation 14-1:

EQUATION 14-1:

DAC OUTPUT VOLTAGE

14.2

Ratiometric Output Level

The DAC output value is derived using a resistor ladder

with each end of the ladder tied to a positive and

negative voltage reference input source. If the voltage

of either input source fluctuates, a similar fluctuation will

result in the DAC output value.

The value of the individual resistors within the ladder

can

found

Section 22.0

“Electrical

Specifications”.

14.3

DAC Voltage Reference Output

The DAC voltage can be output to the DACxOUT pins

by setting the DACOE1 bit of the DACxCON0 register.

Selecting the DAC reference voltage for output on the

DACXOUT pin automatically overrides the digital

output buffer and digital input threshold detector

functions of that pin. Reading the DACXOUT pin when

it has been configured for DAC reference voltage

output will always return a ‘0’.

Due to the limited current drive capability, a buffer must

be used on the DAC voltage reference output for

external

connections

either

DACXOUT

pin.

Figure 14-2 shows a buffering technique example.

14.4

DAC Justification

The DAC can be configured to be left or right justified

based on application needs. In order for justification to

work properly, all 16 bits of the DAC buffer register

(DACxREFH:DACxREFL register pair) must be loaded

in the correct sequence to get the effective 9-bit result.

In most applications, DACxREFL is written prior to

DACxREFH, regardless of justification. The DAC buffer

is loaded at the end of the write cycle that writes

DACxREFH register.

IF DACEN = 1

VSOURCE+ = VDD, VREF, OPA1OUTor FVR BUFFER 2

VSOURCE- = VSS

VOUT

VSOURCE+VSOURCE-

–

 DACR 8



------------------------







VSOURCE-

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