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PIC16F753 数据表(PDF) 144 Page - Microchip Technology

部件名 PIC16F753
功能描述  14/16-Pin, Flash-Based 8-Bit CMOS Microcontrollers
PDF  230 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F753 数据表(HTML) 144 Page - Microchip Technology

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PIC16F753/HV753
DS40001709C-page 144
 2013-2015 Microchip Technology Inc.
DECFSZ
Decrement f, Skip if 0
Syntax:
[ label ] DECFSZ f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(f) - 1
 (destination);
skip if result = 0
Status Affected:
None
Description:
The contents of register ‘f’ are
decremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, then a NOP is
executed instead, making it a
2-cycle instruction.
GOTO
Unconditional Branch
Syntax:
[ label ]
GOTO k
Operands:
0
 k  2047
Operation:
k
 PC<10:0>
PCLATH<4:3>
 PC<12:11>
Status Affected:
None
Description:
GOTO
is an unconditional branch.
The 11-bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a
2-cycle instruction.
INCF
Increment f
Syntax:
[ label ]
INCF f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(f) + 1
 (destination)
Status Affected:
Z
Description:
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
INCFSZ
Increment f, Skip if 0
Syntax:
[ label ]
INCFSZ f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(f) + 1
 (destination),
skip if result = 0
Status Affected:
None
Description:
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result
is placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.
If the result is ‘1’, the next
instruction is executed. If the
result is ‘0’, a NOP is executed
instead, making it a 2-cycle
instruction.
IORLW
Inclusive OR literal with W
Syntax:
[ label ]
IORLW k
Operands:
0
 k  255
Operation:
(W) .OR. k
 (W)
Status Affected:
Z
Description:
The contents of the W register are
OR’ed with the 8-bit literal ‘k’. The
result is placed in the
W register.
IORWF
Inclusive OR W with f
Syntax:
[ label ]
IORWF
f,d
Operands:
0
 f  127
d
 [0,1]
Operation:
(W) .OR. (f)
 (destination)
Status Affected:
Z
Description:
Inclusive OR the W register with
register ‘f’. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is
‘1’, the result is placed back in
register ‘f’.



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