L9908 datasheet(49/152 Pages) STMICROELECTRONICS

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5.11.1

Pre-regulation stage

The pre-regulator stage has the purpose to generate an intermediate supply rail to be used as a reference level

for the Ext. FET ON driving. This function is carried out by a current-limited Single Stage 2-Phases Dickson

charge pump with external capacitance.

Charge Pump1 can be disabled by the dedicated SPI bit CP1_DIS within the SAFETY_RELEVANT3 register, as

follows:

Table 43. Charge pump 1 enable bit

CP1_DIS

Description

Charge Pump 1 Enabled (Default)

Charge Pump 1 Disabled

Table 44. Pre-regulation stage electrical characteristics

Symbol

Parameter

Test Condition

Min Typ Max Unit

Notes

CP1_iout1

Charge Pump1 external Load Current for

no VPRE_UV

5.5 V ≤ VBP < 8 V

CFLY1 = 1 μF

CPRE = 4.7 μF

mA -

CP1_iout2

Charge Pump1 external Load Current for

no VPRE_UV

8 V ≤ VBP

CFLY1 = 1 μF

CPRE = 4.7 μF

mA -

CP1_vout1

Charge Pump1 Output Voltage

4.5 V ≤ VB = < 5.5 V

Iload ≤24 mA

CFLY1 = 1 μF

CPRE = 4.7 μF

5.8

(1)

CP1_vout2

Charge Pump1 Output Voltage

5.5 V ≤ VBP < 11 V

Iload = 24 mA

CFLY1 = 1 μF

CPRE = 4.7 μF

(1)

CP1_vout3

Charge Pump1 Output Voltage

11 V ≤ VBP

Iload = 36 mA

CFLY1 = 1 μF

CPRE = 4.7 μF

(1)

CP1_freq

Charge Pump1 Frequency

180 200 220 kHz

Not subject to

production test

VPRE_boot_time

VPRE boot time at high battery (VBP &

VDH > 10 V)

Iload ≤ 0 mA

CFLY1 = 1 μF

CPRE = 4.7 μF

0 V ≤ VPRE ≤ 7 V

0.2

0.5

ms -

VPRE_boot_time

VPRE boot time at low battery (VBP &

VDH < 10 V)

Iload ≤ 0 mA

CFLY1 = 1 μF

CPRE = 4.7 μF

0 V ≤ VPRE ≤ 7 V

0.5

ms -

1. Iload is the total external current out sink form VPRE equivalent to a gate charge load: Iload = (# of switching FETs) * fPWM

* QgTOT.

Note:

All parameters are guaranteed and tested, in the voltage ranges reported above in Table 5 unless otherwise

specified. Where not specified the parametrical operating range equals the functional operating range.

L9908

Functional description

DS13546 - Rev 5

page 49/152

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