L9908 datasheet(59/152 Pages) STMICROELECTRONICS

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5.12

Half bridges gate drivers

The core feature of L9908 is represented by the three identical and independent gate pre-driver stages to drive

three inverter`s half bridges. Each half bridge pre-driver is composed by a floating current controlled LS and HS

pre-driver couple.

The specific n-th half bridge driver can be disabled by the dedicated SPI bit HBn_DIS, n = [1,2,3], within the

Table 55. n-th Half Bridge pre-drivers disable mode bit

HBn_DIS

Description

n-th HS/LS drivers is enabled (Default)

n-th HS/LS drivers is disabled

When disabled the n-th half bridge driver’s internal HS/LS PU stages are off while the internal HS/LS PD are on

resulting in a VGHS_n-VSHS_n = 0 V and VGLS_n-VSLS_n = 0 V.

Figure 33. Pre-drivers Disable mode behavior

All drivers can be set in high impedance state by the dedicated SPI bit DRV_HIZ within the register GEN_CFG4

as follows:

Table 56. Pre-drivers HIZ mode enable bit

DRV_HIZ

Description

Pre-drivers in NO high impedance

Pre-drivers in high impedance (Default)

When in HIZ mode the half bridge driver’s internal HS/LS PU and PD stages are both off resulting in a VGHS_n-

VSHS_n = HIZ and VGLS_n-VSLS_n = HIZ.

L9908

Functional description

DS13546 - Rev 5

page 59/152

L9908 数据表(PDF) 59 Page - STMicroelectronics