L9908 datasheet(82/152 Pages) STMICROELECTRONICS

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Figure 58. Free running sampling timing diagram - zero current (offset) + command edge-triggering

5.13.2.2.2

Track and hold

In Track and Hold mode the CMn_READ SPI registers and the CSOn voltage track the A/D output starting from

the SAR Triggering Pulse and hold the n-th conversion specified in the CSM_SAMPLE_CFG register.

As a consequence, this kind of sampling method is useful along with a command edge triggering. It turns out that

if no Command Edge is present (ex. INLn rising/falling) the CMn_READ SPI registers and the CSOn voltage

display the last written value.

All A/D output words [phase 1, 2, 3] are tracked and sampled at the same time, synchronously.

The n-th data conversion after the SAR triggering to be hold can be configured by means of the following bits:

Table 74. Current monitors sampling configuration bits

CSMn_SAMPLE_CFG3

CSMn_SAMPLE_CFG1

CSMn_SAMPLE_CFG0

Description

Free running – No T&H (Default)

T&H 1st data conversion from triggering

T&H 2nd data conversion from triggering

T&H 3rd data conversion from triggering

T&H 4th data conversion from triggering

T&H 5th data conversion from triggering

T&H 6th data conversion from triggering

T&H 7th data conversion from triggering

L9908

Functional description

DS13546 - Rev 5

page 82/152

L9908 数据表(PDF) 82 Page - STMicroelectronics