L9908 datasheet(72/152 Pages) STMICROELECTRONICS

72 / 152 page

5.13.1

A/D conversion

The A/D conversion part is composed by a floating differential amplifier (CSA) that feeds an 11bits ADC.

Figure 46. A/D Conversion simplified block diagram

The differential transconductance amplifier measures the voltage across the external shunt cancelling errors due

to voltage drop across the stray resistances and the offsets between the external and internal ground.

The cascaded ADC compares the differential current output from CSA with the output of an 11bit (1bit sign+10bit

module) differential current steering DAC thus converting the current information in an 11 binary-coded word

clocked at 20 MHz.

The DAC LSB can be configured separately for each current monitor channel by means of dedicated SPI bits in

order to adjust the current monitor input range to the ADC input range as follows:

Table 69. Current Monitor input range configuration bit

Input

Range

CSMn_IN_RANGE_CFG2 CSMn_IN_RANGE_CFG1 CSMn_IN_RANGE_CFG0

Description

VIN_MAX = ± 7 mV

VIN _MAX = ±18 mV

VIN _MAX = ±36 mV

VIN_MAX = ±90 mV

VIN_MAX = ±160 mV

VIN_MAX = ±300 mV

(Default)

Reserved

VIN_MAX is the input range for which all parameters are guaranteed. Input Full Scale range is actually larger (to

allow some headroom for calibration purposes), and can be calculated multiplying CM input ADC LSB (indicated

in Table 70) values by 211-1.

To increase the signal to noise ratio, a successive digital process section filters the raw conversion by means of a

SINC Decimation filter with a decimation factor of 16. The output digital information is then available in a 15bit

length word.

L9908

Functional description

DS13546 - Rev 5

page 72/152

L9908 数据表(PDF) 72 Page - STMicroelectronics