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ST72E331 数据表(PDF) 23 Page - STMicroelectronics |
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ST72E331 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 107 page  23/107 ST72E331 ST72T331 Table 6. Interrupt Mapping Source Block Description Register Label Flag Exit from HALT Vector Address Priority Order RESET Reset N/A N/A yes FFFEh-FFFFh TRAP Software N/A N/A no FFFCh-FFFDh NOT USED FFFAh-FFFBh NOT USED FFF8h-FFF9h EI0 Ext. Interrupt (Ports PA0:PA3) N/A N/A yes FFF6h-FFF7h EI1 Ext. Interrupt (Ports PF0:PF2) N/A N/A FFF4h-FFF5h EI2 Ext. Interrupt (Ports PB0:PB3) N/A N/A FFF2h-FFF3h EI3 Ext. Interrupt (Ports PB4:PB7) N/A N/A FFF0h-FFF1h NOT USED FFEEh-FFEFh SPI Transfer Complete SPISR SPIF no FFECh-FFEDh Mode Fault MODF TIMER A Input Capture 1 TASR ICF1_A FFEAh-FFEBh Output Compare 1 OCF1_A Input Capture 2 ICF2_A Output Compare 2 OCF2_A Timer Overflow TOF_A TIMER B Input Capture 1 TBSR ICF1_B FFE8h-FFE9h Output Compare 1 OCF1_B Input Capture 2 ICF2_B Output Compare 2 OCF2_B Timer Overflow TOF_B SCI Transmit Buffer Empty SCISR TDRE FFE6h-FFE7h Transmit Complete TC Receive Buffer Full RDRF Idle Line Detect IDLE Overrun OR EEPROM EEPROM End of Programming EEPCR E2ITE FFE4h-FFE5h NOT USED FFE2h-FFE3h NOT USED FFE0h-FFE1h Highest Priority Priority Lowest 23 |
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