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ST72E331 数据表(PDF) 29 Page - STMicroelectronics |
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ST72E331 数据表(HTML) 29 Page - STMicroelectronics |
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29 / 107 page  29/107 ST72E331 ST72T331 I/O PORTS (Cont’d) Figure 21 . I/O Block Diagram Table 10. Port Mode Configuration Legend: 0 - present, not activated 1 - present and activated Notes: – No OR Register on some ports (see register map). – ADC Switch on ports with analog alternate functions. DR DDR LATCH LATCH DR SEL DDR SEL VDD PAD ANALOG SWITCH ANALOG ENABLE (ADC) M U X ALTERNATE ALTERNATE ALTERNATE ENABLE ALTERNATE M U X ALTERNATE INPUT PULL-UP OUTPUT P-BUFFER (SEE TABLE BELOW) N-BUFFER 1 0 1 0 OR LATCH OR SEL FROM OTHER BITS EXTERNAL PULL-UP CONDITION ENABLE ENABLE GND (SEE TABLE BELOW) (SEE NOTE BELOW) CMOS SCHMITT TRIGGER SOURCE (EIx) INTERRUPT POLARITY SEL GND VDD DIODE (SEE TABLE BELOW) Configuration Mode Pull-up P-buffer VDD Diode Floating 0 0 1 Pull-up 1 0 1 Push-pull 0 1 1 True Open Drain not present not present not present Open Drain (logic level) 0 0 1 29 |
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