ST72E331 datasheet(30/107 Pages) STMICROELECTRONICS

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ST72E331 ST72T331

I/O PORTS (Cont’d)

Table 11. Port Configuration

Notes:

1. ST72T331N only

2. For OTP/EPROM version, when OR=0: floating & when OR=1: reserved

3. For OTP/EPROM version, when OR=0: open-drain, high sink capability & when OR=1: reserved

* Reset state (The bits corresponding to unavailable pins are forced to 1 by hardware, this affects the reset status value).

Warning: All bits of the DDR register which correspond to unconnected I/Os must be left at their reset value. They must

not be modified by the user otherwise a spurious interrupt may be generated.

Port

Pin name

Input (DDR = 0)

Output (DDR = 1)

OR = 0

OR = 1

OR = 0

OR =1

Port A

PA0:PA2 1)

floating*

pull-up with interrupt

open-drain

push-pull

PA3

floating*

pull-up with interrupt

open-drain

push-pull

PA4:PA7

floating*

open drain, high sink capability

Port B

PB0:PB4

floating*

pull-up with interrupt

open-drain

push-pull

PB5:PB7 1)

floating*

pull-up with interrupt

open-drain

push-pull

Port C

PC0:PC7

floating*

pull-up

open-drain

push-pull

Port D

PD0:PD5

floating*

pull-up

open-drain

push-pull

PD6:PD7 1)

floating*

pull-up

open-drain

push-pull

Port E

PE0:PE1

floating*

pull-up

open-drain

push-pull

PE4:PE7 1)

floating*2)

open drain, high sink capability3)

Port F

PF0:PF2

floating*

pull-up with interrupt

open-drain

push-pull

PF4, PF6, PF7

floating*

pull-up

open-drain

push-pull

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