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M306V2EEFS 数据表(PDF) 47 Page - Renesas Technology Corp |
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M306V2EEFS 数据表(HTML) 47 Page - Renesas Technology Corp |
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47 / 271 page  Rev.1.40 Oct 06, 2004 page 47 of 269 M306V2ME-XXXFP, M306V2EEFP 2.7 Interrupts 2.7.1 Type of Interrupts Figure 2.7.1 lists the types of interrupts. Figure 2.7.1 Classification of interrupts Interrupt Software Hardware Special Peripheral I/O (Note) Undefined instruction (UND instruction) Overflow (INTO instruction) BRK instruction INT instruction Reset ________ DBC Watchdog timer Single step Address matched Note: Peripheral I/O interrupts are generated by the peripheral functions built into the microcomputer system. • Maskable interrupt : An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority can be changed by priority level. • Non-maskable interrupt : An interrupt which cannot be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority cannot be changed by priority level. |
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