M306V2EEFS datasheet(24/271 Pages) RENESAS

24 / 271 page

Rev.1.40

Oct 06, 2004 page 24 of 269

M306V2ME-XXXFP, M306V2EEFP

Figure 2.4.1 Processor mode register 0

Processor mode register 0 (Note 1)

Symbol

Address

When reset

PM0

000416

0016 (Note 2)

Bit name

Function

Bit symbol

0 0: Single-chip mode

0 1: Memory expansion mode

1 0: Inhibited

1 1: Microprocessor mode

b1 b0

PM03

PM01

PM00

Processor mode bit

PM02

R/W mode select bit

0 : RD,BHE,WR

1 : RD,WRH,WRL

Software reset bit

The device is reset when this bit is set

to “1”. The value of this bit is “0” when

read.

PM04

0 0 : Multiplexed bus is not used

0 1 : Allocated to CS2 space

1 0 : Allocated to CS1 space

1 1 : Allocated to entire space (Note 4)

b5 b4

Multiplexed bus space

select bit

PM05

PM06

PM07

Port P40 to P43 function

select bit (Note 3)

0 : Address output

1 : Port function

(Address is not output)

BCLK output disable bit

0 : BCLK is output

1 : BCLK is not output

(Pin is left floating)

Notes 1: Set bit 1 of the protect register (address 000A16) to “1” when writing new

values to this register.

2: If the VCC voltage is applied to the CNVSS, the value of this register when

reset is 0316. (PM00 and PM01 both are set to “1”.)

3: Valid in microprocessor and memory expansion modes.

4: If the entire space is of multiplexed bus in memory expansion mode, choose an 8-

bit width.

The processor operates using the separate bus after reset is revoked, so the

entire space multiplexed bus cannot be chosen in microprocessor mode.

Th hi h

if h

l i l

d b

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