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M306V2EEFS 数据表(PDF) 51 Page - Renesas Technology Corp |
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M306V2EEFS 数据表(HTML) 51 Page - Renesas Technology Corp |
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51 / 271 page ![]() Rev.1.40 Oct 06, 2004 page 51 of 269 M306V2ME-XXXFP, M306V2EEFP 2.7.4 Interrupts and Interrupt Vector Tables If an interrupt request is accepted, a program branches to the interrupt routine set in the interrupt vector table. Set the first address of the interrupt routine in each vector table. Figure 2.7.2 shows the format for specifying the address. Two types of interrupt vector tables are available — fixed vector table in which addresses are fixed and variable vector table in which addresses can be varied by the setting. Figure 2.7.2 Format for specifying interrupt vector addresses Mid address Low address 0 0 0 0 High address 0 0 0 0 0 0 0 0 Vector address + 0 Vector address + 1 Vector address + 2 Vector address + 3 LSB MSB (1) Fixed vector tables The fixed vector table is a table in which addresses are fixed. The vector tables are located in an area extending from FFFDC16 to FFFFF16. One vector table comprises four bytes. Set the first address of interrupt routine in each vector table. Table 2.7.1 shows the interrupts assigned to the fixed vector tables and addresses of vector tables. Interrupt source Vector table addresses Remarks Address (L) to address (H) Undefined instruction FFFDC16 to FFFDF16 Interrupt on UND instruction Overflow FFFE016 to FFFE316 Interrupt on INTO instruction BRK instruction FFFE416 to FFFE716 If the vector is filled with FF16, program execution starts from the address shown by the vector in the variable vector table Address match FFFE816 to FFFEB16 There is an address-matching interrupt enable bit Single step (Note) FFFEC16 to FFFEF16 Do not use Watchdog timerFFFF016 to FFFF316 ________ DBC (Note) FFFF416 to FFFF716 Do not use Reserved source FFFE816 to FFFEB16 Do not use Reset FFFFC16 to FFFFF16 Note: Interrupts used for debugging purposes only. Table 2.7.1 Interrupts assigned to the fixed vector tables and addresses of vector tables |
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