M306V2EEFS datasheet(5/271 Pages) RENESAS

5 / 271 page

M306V2ME-XXXFP, M306V2EEFP

Rev.1.40

Oct 06, 2004 page 5 of 269

Item

Performance

Number of basic instructions

91 instructions

Shortest instruction execution time

100 ns(f(XIN)=10 MHz)

Memory

ROM

192K bytes

size

RAM

5K bytes

OSD ROM

61K bytes

OSD RAM

2.2K bytes

I/O port

P0 to P10

8 bits ✕ 8, 5 bits ✕ 2, 4 bits ✕ 1

Multifunction

TA0, TA1, TA2, TA3, TA4

16 bits ✕ 5

timer

TB0, TB1, TB2

16 bits ✕ 3

Serial I/OUART0

1 unit: UART or clock synchronous

UART2

1 unit: UART or clock synchronous

Multi-master I2C-BUS interface 0 1 unit (2 channels)

Multi-master I2C-BUS interface 1 1 unit (1 channel)

A-D converter

8 bits ✕ 6 channels

D-A converter

8 bits ✕ 2 channels

DMAC

2 channels (trigger: 23 sources)

OSD function

Triple layer, 890 kinds of fonts, 42 character ✕ 16 lines

Data slicer

32-bit buffer

HSYNC counter

8 bits ✕ 2 channels

Watchdog timer

15 bits ✕ 1 (with prescaler)

Interrupt

21 internal and 3 external sources, 4 software sources, 7 levels

Clock generating circuit

3 built-in clock generation circuits

Power source voltage

4.5 V to 5.5V (f(XIN ) = 10 MHz)

Power consumption

250 mW

I/OI/O

withstand voltage

5 V

characteristics

Output current

5 mA

Memory expansion

Available

Operating ambient temperature

–10 o C to 70 o C

Device configuration

CMOS high performance silicon gate

Package

100-pin plastic molded QFP

Table 1.5.1 Performance outline

1.5 Performance Outline

Table 1.5.1 is a performance outline.

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