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H8S/2218 数据表(PDF) 449 Page - Renesas Technology Corp |
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H8S/2218 数据表(HTML) 449 Page - Renesas Technology Corp |
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449 / 750 page ![]() Section 12 Serial Communication Interface Rev.6.00 Jun. 03, 2008 Page 401 of 698 REJ09B0074-0600 Table 12.6 BRR Settings for Various Bit Rates (Clocked Synchronous Mode) Operating Frequency φ (MHz) 2 4 6 8 10 16 20 24 Bit Rate (bps) n N n N n N n N n N n N n N n N 110 3 70 — — 250 2 124 2 249 3 124 — — 3 249 500 1 249 2 124 2 249 — — 3 124 — — — — 1 k 1 124 1 249 2 124 — — 2 249 — — — — 2.5 k 0 199 1 99 1 149 1 199 1 249 2 99 2 124 2 149 5 k 0 99 0 199 1 74 1 99 1 124 1 199 1 249 2 74 10 k 0 49 0 99 0 149 0 199 0 249 1 99 1 124 1 149 25 k 0 19 0 39 0 59 0 79 0 99 0 159 0 199 0 239 50 k 0 9 0 19 0 29 0 39 0 49 0 79 0 99 0 119 100 k 0 4 0 9 0 14 0 19 0 24 0 39 0 49 0 59 250 k 0 1 0 3 0 5 0 7 0 9 0 15 0 19 0 23 500 k 0 0* 0 1 0 2 0 3 0 4 0 7 0 9 0 11 1 M 0 0* 0 1 0 3 0 4 0 5 2 M 0 0* 0 1 0 2 2.5 M 0 0* 0 1 — — 4 M 0 0* 5 M 0 0* — — 6 M 0 0* Legend: Blank: Cannot be set. —: Can be set, but there will be a degree of error. *: Continuous transfer is not possible. Table 12.7 Maximum Bit Rate with External Clock Input (Clocked Synchronous Mode) φ (MHz) External Input Clock (MHz) Maximum Bit Rate (Mbps) φ (MHz) External Input Clock (MHz) Maximum Bit Rate (Mbps) 2 0.333 0.333 14 2.333 2.333 4 0.667 0.667 16 2.667 2.667 6 1.000 1.000 18 3.000 3.000 8 1.333 1.333 20 3.333 3.333 10 1.667 1.667 24 4.000 4.000 12 2.000 2.000 Note: In this LSI, operating frequency φ must be 6 MHz or greater. |
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