H8SSLASH2218 datasheet(21/750 Pages) RENESAS

21 / 750 page

Rev.6.00 Jun. 03, 2008 Page xix of xlvi

REJ09B0074-0600

9.2

Input/Output Pins .............................................................................................................. 277

9.3

Register Descriptions ........................................................................................................ 278

9.3.1

Timer Control Register (TCR) ............................................................................. 279

9.3.2

Timer Mode Register (TMDR) ............................................................................ 282

9.3.3

Timer I/O Control Register (TIOR) ..................................................................... 284

9.3.4

Timer Interrupt Enable Register (TIER) .............................................................. 293

9.3.5

Timer Status Register (TSR)................................................................................ 294

9.3.6

Timer Counter (TCNT)........................................................................................ 297

9.3.7

Timer General Register (TGR) ............................................................................ 297

9.3.8

Timer Start Register (TSTR)................................................................................ 297

9.3.9

Timer Synchro Register (TSYR) ......................................................................... 298

9.4

Interface to Bus Master ..................................................................................................... 299

9.4.1

16-Bit Registers ................................................................................................... 299

9.4.2

8-Bit Registers ..................................................................................................... 299

9.5

Operation........................................................................................................................... 301

9.5.1

Basic Functions .................................................................................................... 301

9.5.2

Synchronous Operation........................................................................................ 307

9.5.3

Buffer Operation .................................................................................................. 309

9.5.4

PWM Modes ........................................................................................................ 313

9.5.5

Phase Counting Mode .......................................................................................... 317

9.6

Interrupts ........................................................................................................................... 322

9.6.1

Interrupt Source and Priority................................................................................ 322

9.6.2

DMAC Activation................................................................................................ 323

9.6.3

A/D Converter Activation .................................................................................... 323

9.7

Operation Timing .............................................................................................................. 324

9.7.1

Input/Output Timing ............................................................................................ 324

9.7.2

Interrupt Signal Timing........................................................................................ 327

9.8

Usage Notes ...................................................................................................................... 331

Section 10 Watchdog Timer (WDT)..............................................................................339

10.1

Features ............................................................................................................................. 339

10.2

Register Descriptions ........................................................................................................ 340

10.2.1 Timer Counter (TCNT)........................................................................................ 340

10.2.2 Timer Control/Status Register (TCSR) ................................................................ 340

10.2.3 Reset Control/Status Register (RSTCSR) ............................................................ 342

10.3

Operation........................................................................................................................... 343

10.3.1 Watchdog Timer Mode ........................................................................................ 343

10.3.2 Timing of Setting of Watchdog Timer Overflow Flag (WOVF) ......................... 344

10.3.3 Interval Timer Mode ............................................................................................ 344

10.3.4 Timing of Setting of Overflow Flag (OVF) ......................................................... 345

10.4

Interrupts ........................................................................................................................... 345

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