H8SSLASH2218 datasheet(26/750 Pages) RENESAS

26 / 750 page

Rev.6.00 Jun. 03, 2008 Page xxiv of xlvi

REJ09B0074-0600

Section 15 A/D Converter .................................................................................................535

15.1

Features .............................................................................................................................535

15.2

Input/Output Pins ..............................................................................................................537

15.3

Register Descriptions.........................................................................................................537

15.3.1 A/D Data Registers A to D (ADDRA to ADDRD) ..............................................538

15.3.2 A/D Control/Status Register (ADCSR) ................................................................538

15.3.3 A/D Control Register (ADCR).............................................................................540

15.4

Interface to Bus Master .....................................................................................................541

15.5

Operation ...........................................................................................................................542

15.5.1 Single Mode .........................................................................................................542

15.5.2 Scan Mode............................................................................................................543

15.5.3 Input Sampling and A/D Conversion Time ..........................................................544

15.5.4 External Trigger Input Timing .............................................................................545

15.6

Interrupts ...........................................................................................................................546

15.7

A/D Conversion Precision Definitions ..............................................................................546

15.8

Usage Notes.......................................................................................................................548

15.8.1 Module Stop Mode Setting...................................................................................548

15.8.2 Permissible Signal Source Impedance..................................................................548

15.8.3 Influences on Absolute Precision .........................................................................548

15.8.4 Range of Analog Power Supply and Other Pin Settings ......................................549

15.8.5 Notes on Board Design.........................................................................................549

Section 16 RAM...................................................................................................................551

Section 17 Flash Memory (F-ZTAT Version).............................................................553

17.1

Features .............................................................................................................................553

17.2

Mode Transitions...............................................................................................................554

17.3

Block Configuration ..........................................................................................................558

17.4

Input/Output Pins ..............................................................................................................560

17.5

Register Descriptions.........................................................................................................560

17.5.1 Flash Memory Control Register 1 (FLMCR1) .....................................................561

17.5.2 Flash Memory Control Register 2 (FLMCR2) .....................................................562

17.5.3 Erase Block Register 1 (EBR1) ............................................................................563

17.5.4 Erase Block Register 2 (EBR2) ............................................................................564

17.5.5 RAM Emulation Register (RAMER) ...................................................................565

17.5.6 Serial Control Register X (SCRX) .......................................................................566

17.6

On-Board Programming Modes ........................................................................................567

17.6.1 SCI Boot Mode (HD64F2218, HD64F2212, and HD64F2211)...........................567

17.6.2 USB Boot Mode (HD64F2218U, HD64F2212U, and HD64F2211U).................571

17.6.3 Programming/Erasing in User Program Mode .....................................................576

17.7

Flash Memory Emulation in RAM ....................................................................................577

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