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H8S/2218 数据表(PDF) 55 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 55 Page - Renesas Technology Corp

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Section 1 Overview
Rev.6.00 Jun. 03, 2008 Page 7 of 698
REJ09B0074-0600
1.3
Pin Arrangements
The pin arrangements of the HD64F2218 and HD64F2218U are shown in figures 1.5 and 1.6. The
pin arrangements of the HD6432217 are shown in figures 1.7 and 1.8. The pin arrangements of the
HD64F2212, HD64F2212U, HD64F2211, and HD64F2211U are shown in figures 1.9 and 1.11.
The pin arrangements of the HD6432211, HD6432210 and HD6432210S is shown in figures 1.10
and 1.12.
TFP-100G
TFP-100GV
(Top View)
The FWE pin is provided only in the HD64F2218 and HD64F2218U.
When EMLE = 0, boundary scan is available and the pins function as TDO, TCK, TMS,
TRST, and TDI, respectively.
When EMLE = 1, H-UDI function is available and the pins function as TDO, TCK, TMS,
TRST, and TDI, respectively.
Notes: 1.
2.
PD4/D12
PD5/D13
PD6/D14
PD7/D15
FWE*1
NMI
EMLE*2
TDO*2
TCK*2
TMS*2
TRST*2
TDI*2
VCC
PF7/
φ
VSS
PF6/
AS
PF5/
RD
PF4/
HWR
PF3/
LWR/ADTRG/IRQ3
PF2/
WAIT
PF1/
BACK
PF0/
BREQ/IRQ2
PA3/A19/SCK2
PA2/A18/RxD2
PA1/A17/TxD2
PB5/A13
PB4/A12
PLLVCC
UBPM
PLLVSS
P40/AN0
P41/AN1
P42/AN2
P43/AN3
Vref
PB3/A11
PB2/A10
PB1/A9
PB0/A8
P96/AN14
P97/AN15
DrVSS
USD-
USD+
DrVCC
P36(PUPD+)
VBUS
PG4/
CS0
PG3/
CS1
PG2/
CS2
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
Figure 1.5 Pin Arrangements of HD64F2218 and HD64F2218U (TFP-100G, TFP-100GV)



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