数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

H8S/2218 数据表(PDF) 559 Page - Renesas Technology Corp

部件名 H8S/2218
功能描述  16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series
PDF  750 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8S/2218 数据表(HTML) 559 Page - Renesas Technology Corp

Back Button H8S/2218 Datasheet HTML 555Page - Renesas Technology Corp H8S/2218 Datasheet HTML 556Page - Renesas Technology Corp H8S/2218 Datasheet HTML 557Page - Renesas Technology Corp H8S/2218 Datasheet HTML 558Page - Renesas Technology Corp H8S/2218 Datasheet HTML 559Page - Renesas Technology Corp H8S/2218 Datasheet HTML 560Page - Renesas Technology Corp H8S/2218 Datasheet HTML 561Page - Renesas Technology Corp H8S/2218 Datasheet HTML 562Page - Renesas Technology Corp H8S/2218 Datasheet HTML 563Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 559 / 750 page
background image
Section 14 Universal Serial Bus (USB)
Rev.6.00 Jun. 03, 2008 Page 511 of 698
REJ09B0074-0600
(5) Status Stage (Control-Out)
The control-out status stage starts with an IN token from the host. When an IN-token is
received at the start of the status stage, there is not yet any data in the EP0i FIFO, and so an
EP0i transfer request interrupt is generated. The firmware recognizes from this interrupt that
the status stage has started. Next, in order to transmit 0-byte data to the host, 1 is written to the
EP0i packet enable bit but no data is written to the EP0i FIFO. As a result, the next IN token
causes 0-byte data to be transmitted to the host, and control transfer ends.
After the firmware has finished all processing relating to the data stage, 1 should be written to
the EP0i packet enable bit.
USB function
Firmware
Receive IN token
Transfer 0-byte data to host
End of control transfer
Set EP0i transmit
complete flag
(EP0iTS in UIFR0 = 1)
Clear EP0i transfer
request flag
(EP0iTR in UIFR0 = 0)
Write 1 to EP0i packet
enable bit
(EP0iPKTE in UTRG0 = 1)
Write 0 to EP0i transfer
request interrupt enable bit
(EP0iTRE in UIER0 = 0)
Clear EP0i transmit
complete flag
(EP0iTS in UIFR0 = 0)
End of control transfer
Valid data
in EP0i FIFO?
ACK
Yes
No
NAK
EXIRQx
EXIRQx
Figure 14.16 Status Stage Operation (Control-Out)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com