H8SSLASH2218 datasheet(565/750 Pages) RENESAS

565 / 750 page

Section 14 Universal Serial Bus (USB)

Rev.6.00 Jun. 03, 2008 Page 517 of 698

REJ09B0074-0600

14.5.9

Stall Operations

(1) Overview

This section describes stall operations in the USB function module. There are two cases in

which the USB function module stall function is used:

Α. When the firmware forcibly stalls an endpoint for some reason

Β. When a stall is performed automatically within the USB function module due to a USB

specification violation.

The USB function module has internal status bits that hold the status (stall or non-stall) of each

endpoint. When a transaction is sent from the host, the module refers these internal status bits

and determines whether to return a stall to the host. These bits cannot be cleared by the

firmware; they must be cleared with a Clear Feature command from the host. However, the

internal status bit for EP0 is cleared automatically at the reception of the setup command.

(2) Forcible Stall by Firmware

The firmware uses the UESTL register to issue a stall request for the USB function module.

When the firmware wishes to stall a specific endpoint, it sets the corresponding EPnSTL bit (1-

1 in figure 14.20). The internal status bits are not changed at this time.

When a transaction is sent from the host for the endpoint for which the EPnSTL bit was set, the

USB function module refers the internal status bit, and if this is not set, refers the

corresponding EPnSTL bit (1-2 in figure 14.20). If the corresponding EPnSTL bit is not set, the

internal status bit is not changed and the transaction is accepted. If the corresponding EPnSTL

bit is set, the USB function module sets the internal status bit and returns a stall handshake to

the host (1-3 in figure 14.20).

Once an internal status bit is set, it remains set until cleared by a Clear Feature command from

the host, without regarding to EPnSTL. Even after a bit is cleared by the Clear Feature

command (3-1 in figure 14.20), the USB function module continues to return a stall handshake

while the EPnSTL bit is set, since the internal status bit is set each time a transaction is

executed for the corresponding endpoint (1-2 in figure 14.20). To clear a stall, therefore, it is

necessary for the corresponding EPnSTL bit to be cleared by the firmware, and also for the

internal status bit to be cleared with a Clear Feature command (2-1 to 2-3 in figure 14.20).

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