H8SSLASH2218 datasheet(601/750 Pages) RENESAS

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Section 17 Flash Memory (F-ZTAT Version)

Rev.6.00 Jun. 03, 2008 Page 553 of 698

REJ09B0074-0600

Section 17 Flash Memory (F-ZTAT Version)

The features of the on-chip flash memory are summarized below. The block diagram of the flash

memory is shown in figure 17.1.

17.1

Features

• Size:

Product Class

ROM Size

ROM Address

H8S/2218 Group

HD64F2218, HD64F2218U

128 kbytes

H'000000 to H'01FFFF

(Modes 6 and 7)

H8S/2212 Group

HD64F2212, HD64F2212U

H'000000 to H'01FFFF

(Mode 7)

HD64F2211, HD64F2211U

64 kbytes

H'000000 to H'00FFFF

(Mode 7)

• Programming/erase methods

⎯ The flash memory is programmed 128 bytes at a time. Erase is performed in single-block

units. The flash memory is configured as follows: 32 kbytes

× 2 blocks, 28 kbytes × 1

block, 16 kbytes

× 8 blocks, 8 kbytes × 1 block, and 1 kbyte × 4 blocks. To erase the entire

flash memory, each block must be erased in turn.

• Reprogramming capability

⎯ Flash memory can be reprogrammed a minimum of 100 times.

• Two flash memory operating modes

⎯ Boot mode

SCI boot mode: HD64F2218, HD64F2212, and HD64F2211

USB boot mode: HD64F2218U, HD64F2212U, and HD64F2211U

⎯ User program mode

On-board programming/erasing can be done in boot mode in which the boot program built

into the chip is started for erase or programming of the entire flash memory. In normal user

program mode, individual blocks can be erased or programmed.

• Automatic bit rate adjustment

⎯ With data transfer in SCI boot mode, this LSI's bit rate can be automatically adjusted to

match the transfer bit rate of the host.

• Programming/erasing protection

⎯ Sets hardware protection, software protection, and error protection against flash memory

programming/erasing.

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