H8SSLASH2218 datasheet(264/750 Pages) RENESAS

264 / 750 page

Section 8 I/O Ports

Rev.6.00 Jun. 03, 2008 Page 216 of 698

REJ09B0074-0600

8.1

Port 1

In the H8S/2218 Group, the port 1 is an 8-bit I/O port also functioning as address bus pins, TPU

I/O pins, and external interrupt input pins. In the H8S/2212 Group, the port 1 is an 8-bit I/O port

also functioning as TPU I/O pins and external interrupt input pins. The port 1 has the following

registers.

• Port 1 data direction register (P1DDR)

• Port 1 data register (P1DR)

• Port 1 register (PORT1)

8.1.1

Port 1 Data Direction Register (P1DDR)

P1DDR specifies input or output for the pins of the port 1.

Since P1DDR is a write-only register, the bit manipulation instructions must not be used to write

P1DDR. For details, see section 2.9.4, Accessing Registers Containing Write-Only Bits.

Bit

Bit Name Initial Value

R/W

Description

P17DDR

P16DDR

P15DDR

P14DDR

P13DDR

P12DDR

P11DDR

P10DDR

(H8S/2218 Group)

Modes 4 to 6:

If address output is enabled by the setting of bits AE3 to

AE0 in PFCR, pins P13 to P10 are address outputs. Pins

P17 to P14, and pins P13 to P10 when address output is

disabled, are output ports when the corresponding

P1DDR bits are set to 1, and input ports when the

corresponding P1DDR bits are cleared to 0.

Mode 7:

Setting a P1DDR bit to 1 makes the corresponding port 1

pin an output port, while clearing the bit to 0 makes the

pin an input port.

(H8S/2212 Group)

Setting a P1DDR bit to 1 makes the corresponding port 1

pin an output port, while clearing the bit to 0 makes the

pin an input port.

H8S/2218 数据表(PDF) 264 Page - Renesas Technology Corp

H8S/2218 数据表(HTML) 264 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载