H8SSLASH2218 datasheet(272/750 Pages) RENESAS

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Section 8 I/O Ports

Rev.6.00 Jun. 03, 2008 Page 224 of 698

REJ09B0074-0600

8.2.2

Port 3 Data Register (P3DR)

P3DR stores output data for the port 3 pins.

Bit

Bit Name Initial Value

R/W

Description

⎯

Undefined

⎯

Reserved

This bit is undefined and cannot be modified.

P36DR

R/W

Stores output data for a pin that functions as a general

output port.

5 to

⎯

Undefined

⎯

Reserved

These bits are undefined and cannot be modified.

P32DR

P31DR

P30DR

R/W

Store output data for a pin that functions as a general

output port.

8.2.3

Port 3 Register (PORT3)

PORT3 indicates the pin states of the port 3.

Bit

Bit Name Initial Value

R/W

Description

⎯

Undefined

⎯

Reserved

This bit is undefined.

P36

⎯*

If the port 3 is read while P3DDR bits are set to 1, the

P3DR value is read. If the port 3 is read while P3DDR bits

are cleared to 0, the pin states are read.

5 to

⎯

Undefined

⎯

Reserved

These bits are undefined.

P32

P31

P30

⎯*

If the port 3 is read while P3DDR bits are set to 1, the

P3DR value is read. If the port 3 is read while P3DDR bits

are cleared to 0, the pin states are read.

Note: * Determined by the states of pins P36 and P32 to P30.

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