H8SSLASH2218 datasheet(317/750 Pages) RENESAS

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Section 8 I/O Ports

Rev.6.00 Jun. 03, 2008 Page 269 of 698

REJ09B0074-0600

8.12.2

Port G Data Register (PGDR)

PGDR stores output data for the port G pins.

Bit

Bit Name Initial Value

R/W

Description

7 to

⎯

Undefined

⎯

Reserved

These bits are undefined and cannot be modified.

PG4DR*

PG3DR*

PG2DR*

PG1DR

PG0DR*

R/W

Store output data for a pin that functions as a general

output port.

Notes: 1. Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read.

This bit cannot be modified.

2. Reserved in the H8S/2218 Group. If this bit is read, an undefined value will be read.

This bit cannot be modified.

8.12.3

Port G Register (PORTG)

PORTG indicates the pin states of the port G.

Bit

Bit Name Initial Value

R/W

Description

7 to

⎯

Undefined

⎯

Reserved

These bits are undefined.

PG4*

PG3*

PG2*

PG1

PG0*

⎯*1

If the port G is read while PGDDR bits are set to 1, the

PGDR value is read. If the port G is read while PGDDR

bits are cleared to 0, the pin states are read.

Notes: 1. Determined by the states of pins PG4 to PG0.

2. Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read.

3. Reserved in the H8S/2218 Group. If this bit is read, an undefined value will be read.

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