SH7708 datasheet(318/633 Pages) RENESAS

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SH7708 数据表(PDF) 318 Page - Renesas Technology Corp

部件名	SH7708

功能描述	SuperH??RISC engine

PDF	633 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

318 / 633 page

300

10.4.5

Note on DRAM Connection for Areas 2 and 3

When area 2 or area 3 is connected to DRAM in the SH7708 or SH7708S, if a DRAM access

request occurs immediately after a CAS-before-RAS refresh, the RAS precharge cycle value (tPC)

always assumes its initial value regardless of the value set in MCR. Thus, the interval from RAS

negation to the next RAS assertion in CAS-before-RAS refreshing is a two-cycle output interval

(see figure below).

If a request does not immediately follow a CAS-before-RAS refresh, the number of RAS

precharge cycles set by the MCR value are secured.

Two cycles

RAS negation

in CAS-before-

RAS refreshing

RAS asserted by

next bus access

CKIO

RAS

Restriction: If a DRAM access request occurs immediately after a CAS-before-RAS refresh, the

interval from RAS negation to the next RAS assertion is two cycles.

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