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H8/3003 数据表(PDF) 368 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 368 Page - Renesas Technology Corp |
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368 / 715 page  — General register settings outside the counting range (H'0000 to GRA3) Waveforms with a duty cycle of 0% or 100% can be output by setting a general register to a value outside the counting range. When a buffer register is set to a value outside the counting range, then later restored to a value within the counting range, the counting direction (up or down) must be the same both times. See figure 10-42. Figure 10-42 Changing a General Register Setting by Buffer Transfer (Example 2) Settings can be made in this way by detecting GRA3 compare match or TCNT4 underflow before writing to the buffer register. They can also be made by using GRA3 compare match to activate the DMAC. 0% duty cycle 100% duty cycle Write during down-counting Write during up-counting GRA3 GR H'0000 Output pin Output pin BR GR 350 |
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