H8SLASH3003 datasheet(380/715 Pages) RENESAS

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H8/3003 数据表(PDF) 380 Page - Renesas Technology Corp

部件名	H8/3003

功能描述	microcontroller (MCU)

PDF	715 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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380 / 715 page

10.5 Interrupts

The ITU has two types of interrupts: input capture/compare match interrupts, and overflow

interrupts.

10.5.1 Setting of Status Flags

Timing of Setting of IMFA and IMFB at Compare Match: IMFA and IMFB are set to 1 by a

compare match signal generated when TCNT matches a general register (GR). The compare

match signal is generated in the last state in which the values match (when TCNT is updated from

the matching count to the next count). Therefore, when TCNT matches a general register, the

compare match signal is not generated until the next timer clock input. Figure 10-57 shows the

timing of the setting of IMFA and IMFB.

Figure 10-57 Timing of Setting of IMFA and IMFB by Compare Match

TCNT

IMF

IMI

TCNT input

clock

Compare

match signal

N + 1

362

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