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H8/3003 数据表(PDF) 404 Page - Renesas Technology Corp

部件名 H8/3003
功能描述  microcontroller (MCU)
PDF  715 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3003 数据表(HTML) 404 Page - Renesas Technology Corp

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11.2.3 Port B Data Direction Register (PBDDR)
PBDDR is an 8-bit write-only register that selects input or output for each pin in port B.
Port B is multiplexed with pins TP15 to TP8. Bits corresponding to pins used for TPC output must
be set to 1. For further information about PBDDR, see section 9.9, Port B.
11.2.4 Port B Data Register (PBDR)
PBDR is an 8-bit readable/writable register that stores TPC output data for groups 2 and 3, when
these TPC output groups are used.
For further information about PBDR, see section 9.9, Port B.
Bit
Initial value
Read/Write
7
PB DDR
0
W
Port B data direction 7 to 0
These bits select input or
output for port B pins
7
6
PB DDR
0
W
6
5
PB DDR
0
W
5
4
PB DDR
0
W
4
3
PB DDR
0
W
3
2
PB DDR
0
W
2
1
PB DDR
0
W
1
0
PB DDR
0
W
0
Bit
Initial value
Read/Write
0
PB
0
R/(W)
0
1
PB
0
R/(W)
1
2
PB
0
R/(W)
2
3
PB
0
R/(W)
3
4
PB
0
R/(W)
4
5
PB
0
R/(W)
5
6
PB
0
R/(W)
6
7
PB
0
R/(W)
7
Port B data 7 to 0
These bits store output data
for TPC output groups 2 and 3
*
*
**
**
*
*
Note:
Bits selected for TPC output by NDERB settings become read-only bits.
*
386



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