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H8/3003 数据表(PDF) 416 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 416 Page - Renesas Technology Corp |
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416 / 715 page ![]() 11.3 Operation 11.3.1 Overview When corresponding bits in PADDR or PBDDR and NDERA or NDERB are set to 1, TPC output is enabled. The TPC output initially consists of the corresponding PADR or PBDR contents. When a compare-match event selected in TPCR occurs, the corresponding NDRA or NDRB bit contents are transferred to PADR or PBDR to update the output values. Figure 11-2 illustrates the TPC output operation. Table 11-3 summarizes the TPC operating conditions. Figure 11-2 TPC Output Operation Table 11-3 TPC Operating Conditions NDER DDR Pin Function 0 0 Generic input port 1 Generic output port 1 0 Generic input port (but the DR bit is a read-only bit, and when compare match occurs, the NDR bit value is transferred to the DR bit) 1 TPC pulse output Sequential output of up to 16-bit patterns is possible by writing new output data to NDRA and NDRB before the next compare match. For information on non-overlapping operation, see section 11.3.4, Non-Overlapping TPC Output. DDR NDER QQ TPC output pin DR NDR C QD QD Internal data bus Output trigger signal 398 |
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