H8SLASH3003 datasheet(478/715 Pages) RENESAS

478 / 715 page

In receiving, the SCI operates as follows.

•

The SCI monitors the receive data line. When it detects a start bit, the SCI synchronizes

internally and starts receiving.

•

Receive data is stored in RSR in order from LSB to MSB.

•

The parity bit and stop bit are received.

After receiving, the SCI makes the following checks:

— Parity check:

The number of 1s in the receive data must match the even or odd parity

setting of the O/

E bit in SMR.

— Stop bit check: The stop bit value must be 1. If there are two stop bits, only the first stop

bit is checked.

— Status check:

The RDRF flag must be 0 so that receive data can be transferred from

RSR into RDR.

If these checks all pass, the RDRF flag is set to 1 and the received data is stored in RDR. If one of

the checks fails (receive error), the SCI operates as indicated in table 13-11.

Note: When a receive error occurs, further receiving is disabled. In receiving, the RDRF flag is

not set to 1. Be sure to clear the error flags.

•

When the RDRF flag is set to 1, if the RIE bit is set to 1 in SCR, a receive-data-full interrupt

(RXI) is requested. If the ORER, PER, or FER flag is set to 1 and the RIE bit in SCR is also

set to 1, a receive-error interrupt (ERI) is requested.

Table 13-11 Receive Error Conditions

Receive Error

Abbreviation

Condition

Data Transfer

Overrun error

ORER

Receiving of next data ends

Receive data not transferred

while RDRF flag is still set to

from RSR to RDR

1 in SSR

Framing error

FER

Stop bit is 0

Receive data transferred

from RSR to RDR

Parity error

PER

Parity of receive data differs

Receive data transferred

from even/odd parity setting

from RSR to RDR

in SMR

460

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