H8SLASH3003 datasheet(481/715 Pages) RENESAS

481 / 715 page

Transmitting and Receiving Data

Transmitting Multiprocessor Serial Data: Figure 13-10 shows a sample flowchart for

transmitting multiprocessor serial data and indicates the procedure to follow.

Figure 13-10 Sample Flowchart for Transmitting Multiprocessor Serial Data

Yes

Initialize

Start transmitting

Read TDRE flag in SSR

TDRE = 1?

Write transmit data in

TDR and set MPBT bit in SSR

Clear TDRE flag to 0

All data transmitted?

Read TEND flag in SSR

TEND = 1?

SCI initialization: the transmit data

output function of the TxD pin is

selected automatically.

SCI status check and transmit data

write: read SSR, check that the TDRE

flag is 1, then write transmit

data in TDR. Also set the MPBT flag to

0 or 1 in SSR. Finally, clear the TDRE

flag to 0.

To continue transmitting serial data:

after checking that the TDRE flag is 1,

indicating that data can be

written, write data in TDR, then clear

the TDRE flag to 0. When the DMAC

is activated by a transmit-data-empty

interrupt request (TXI) to write data in

TDR, the TDRE flag is checked and

cleared automatically.

To output a break signal at the end of

serial transmission: set the DDR bit to

1 and clear the DR bit to 0 (DDR and

DR are I/O port registers), then clear

the TE bit to 0 in SCR.

Output break signal?

Clear DR bit to 0, set DDR bit to 1

Clear TE bit to 0 in SCR

End

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