H8SLASH3003 datasheet(483/715 Pages) RENESAS

483 / 715 page

Receiving Multiprocessor Serial Data: Figure 13-12 shows a sample flowchart for receiving

multiprocessor serial data and indicates the procedure to follow.

Figure 13-12 Sample Flowchart for Receiving Multiprocessor Serial Data (1)

Initialize

Start receiving

Read RDRF flag in SSR

RDRF = 1?

Read receive data from RDR

Read ORER and FER flags in SSR

FER

ORER = 1

Read RDRF flag in SSR

∨

RDRF = 1?

Read receive data from RDR

Finished receiving?

Clear RE bit to 0 in SCR

Error handling

(continued on next page)

End

SCI initialization: the receive data function

of the RxD pin is selected automatically.

ID receive cycle: set the MPIE bit to 1 in SCR.

SCI status check and ID check: read SSR,

check that the RDRF flag is set to 1, then read

data from RDR and compare with the

processor’s own ID. If the ID does not match,

set the MPIE bit to 1 again and clear the

RDRF flag to 0. If the ID matches, clear the

RDRF flag to 0.

SCI status check and data receiving: read

SSR, check that the RDRF flag is set to 1,

then read data from RDR.

Receive error handling and break detection:

if a receive error occurs, read the

ORER and FER flags in SSR to identify the error.

After executing the necessary error handling,

clear the ORER and FER flags both to 0.

Receiving cannot resume while either the ORER

or FER flag remains set to 1. When a framing

error occurs, the RxD pin can be read to detect

the break state.

Yes

Set MPIE bit to 1 in SCR

Read ORER and FER flags in SSR

Yes

FER

PRER = 1

∨

Own ID?

465

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