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数据搜索系统，热门电子元器件搜索 |
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H8/3003 数据表(PDF) 507 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 507 Page - Renesas Technology Corp |
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507 / 715 page  Bit 7—A/D End Flag (ADF): Indicates the end of A/D conversion. Bit 7 ADF Description 0 [Clearing condition] (Initial value) Cleared by reading ADF while ADF = 1, then writing 0 in ADF 1 [Setting conditions] Single mode: A/D conversion ends Scan mode: A/D conversion ends in all selected channels Bit 6—A/D Interrupt Enable (ADIE): Enables or disables the interrupt (ADI) requested at the end of A/D conversion. Bit 6 ADIE Description 0 A/D end interrupt request (ADI) is disabled (Initial value) 1 A/D end interrupt request (ADI) is enabled Bit 5—A/D Start (ADST): Starts or stops A/D conversion. The ADST bit remains set to 1 during A/D conversion. It can also be set to 1 by external trigger input at the ADTRG pin. Bit 5 ADST Description 0 A/D conversion is stopped (Initial value) 1 Single mode: A/D conversion starts; ADST is automatically cleared to 0 when conversion ends. Scan mode: A/D conversion starts and continues, cycling among the selected channels, until ADST is cleared to 0 by software, by a reset, or by a transition to standby mode. 489 |
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