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H8/3003 数据表(PDF) 576 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 576 Page - Renesas Technology Corp |
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576 / 715 page ![]() TIable A-1 Instruction Set (cont) Condition Code Mnemonic Operation I H N Z V C INC.L #1, ERd L ERd32+1 → ERd32 2 — — ¤¤¤ —2 INC.L #2, ERd L ERd32+2 → ERd32 2 — — ¤¤¤ —2 DAA Rd B Rd8 decimal adjust 2— * ¤¤ * —2 → Rd8 SUB.B Rs, Rd B Rd8–Rs8 → Rd8 2 — ¤¤¤¤¤ 2 SUB.W #xx:16, Rd W Rd16–#xx:16 → Rd16 4 — 1 ¤¤¤¤ 4 SUB.W Rs, Rd W Rd16–Rs16 → Rd16 2 — 1 ¤¤¤¤ 2 SUB.L #xx:32, ERd L ERd32–#xx:32 6 — 2 ¤¤¤¤ 6 → ERd32 SUB.L ERs, ERd L ERd32–ERs32 2 — 2 ¤¤¤¤ 2 → ERd32 SUBX.B #xx:8, Rd B Rd8–#xx:8–C → Rd8 2 — ¤¤ 3 ¤¤ 2 SUBX.B Rs, Rd B Rd8–Rs8–C → Rd8 2 — ¤¤ 3 ¤¤ 2 SUBS.L #1, ERd L ERd32–1 → ERd32 2 —————— 2 SUBS.L #2, ERd L ERd32–2 → ERd32 2 —————— 2 SUBS.L #4, ERd L ERd32–4 → ERd32 2 —————— 2 DEC.B Rd B Rd8–1 → Rd8 2 — — ¤¤¤ —2 DEC.W #1, Rd W Rd16–1 → Rd16 2 — — ¤¤¤ —2 DEC.W #2, Rd W Rd16–2 → Rd16 2 — — ¤¤¤ —2 DEC.L #1, ERd L ERd32–1 → ERd32 2 — — ¤¤¤ —2 DEC.L #2, ERd L ERd32–2 → ERd32 2 — — ¤¤¤ —2 DAS.Rd B Rd8 decimal adjust 2— * ¤¤ * —2 → Rd8 MULXU. B Rs, Rd B Rd8 × Rs8 → Rd16 2 —————— 14 (unsigned multiplication) MULXU. W Rs, ERd W Rd16 × Rs16 → ERd32 2 —————— 22 (unsigned multiplication) MULXS. B Rs, Rd B Rd8 × Rs8 → Rd16 4 — — ¤¤ —— 16 (signed multiplication) MULXS. W Rs, ERd W Rd16 × Rs16 → ERd32 4 — — ¤¤ —— 24 (signed multiplication) DIVXU. B Rs, Rd B Rd16 ÷ Rs8 → Rd16 2 — — 67 —— 14 (RdH: remainder, RdL: quotient) (unsigned division) Addressing Mode and Instruction Length (bytes) No. of States *1 558 |
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