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H8/3003 数据表(PDF) 577 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 577 Page - Renesas Technology Corp |
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577 / 715 page ![]() Table A-1 Instruction Set (cont) Condition Code Mnemonic Operation I H N Z V C DIVXU. W Rs, ERd W ERd32 ÷ Rs16 →ERd32 2 — — 67 —— 22 (Ed: remainder, Rd: quotient) (unsigned division) DIVXS. B Rs, Rd B Rd16 ÷ Rs8 → Rd16 4 — — 87 —— 16 (RdH: remainder, RdL: quotient) (signed division) DIVXS. W Rs, ERd W ERd32 ÷ Rs16 → ERd32 4 — — 87 —— 24 (Ed: remainder, Rd: quotient) (signed division) CMP.B #xx:8, Rd B Rd8–#xx:8 2 — ¤¤¤¤¤ 2 CMP.B Rs, Rd B Rd8–Rs8 2 — ¤¤¤¤¤ 2 CMP.W #xx:16, Rd W Rd16–#xx:16 4 — 1 ¤¤¤¤ 4 CMP.W Rs, Rd W Rd16–Rs16 2 — 1 ¤¤¤¤ 2 CMP.L #xx:32, ERd L ERd32–#xx:32 6 — 2 ¤¤¤¤ 4 CMP.L ERs, ERd L ERd32–ERs32 2 — 2 ¤¤¤¤ 2 NEG.B Rd B 0–Rd8 → Rd8 2 — ¤¤¤¤¤ 2 NEG.W Rd W 0–Rd16 → Rd16 2 — ¤¤¤¤¤ 2 NEG.L ERd L 0–ERd32 → ERd32 2 — ¤¤¤¤¤ 2 EXTU.W Rd W 0 → (<bits 15 to 8> 2 — — 0 ¤ 0— 2 of Rd16) EXTU.L ERd L 0 → (<bits 31 to 16> 2 — — 0 ¤ 0— 2 of Rd32) EXTS.W Rd W (<bit 7> of Rd16) → 2— — ¤¤ 0— 2 (<bits 15 to 8> of Rd16) EXTS.L ERd L (<bit 15> of Rd32) → 2— — ¤¤ 0— 2 (<bits 31 to 16> of ERd32) Addressing Mode and Instruction Length (bytes) No. of States *1 559 |
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