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H8/3003 数据表(PDF) 639 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 639 Page - Renesas Technology Corp |
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639 / 715 page ![]() TSR0—Timer Status Register 0 H'67 ITU0 Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 IMFA 0 R/(W) 2 OVF 0 R/(W) 1 IMFB 0 R/(W) Input capture/compare match flag A 0 [Clearing condition] Overflow flag ** * Read IMFA when IMFA = 1, then write 0 in IMFA 1 [Setting conditions] TCNT = GRA when GRA functions as a compare match register. TCNT value is transferred to GRA by an input capture signal, when GRA functions as an input capture register. Input capture/compare match flag B 0 [Clearing condition] Read IMFB when IMFB = 1, then write 0 in IMFB 1 [Setting conditions] TCNT = GRB when GRB functions as a compare match register. TCNT value is transferred to GRB by an input capture signal, when GRB functions as an input capture register. 0 [Clearing condition] Read OVF when OVF = 1, then write 0 in OVF 1 [Setting condition] TCNT overflowed from H'FFFF to H'0000 Note: Only 0 can be written, to clear the flag. * 621 |
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