H8SLASH3003 datasheet(127/715 Pages) RENESAS

127 / 715 page

6.3 Operation

6.3.1 Area Division

The external address space is divided into areas 0 to 7. Each area has a size of 128 kbytes in the

1-Mbyte modes, or 2 Mbytes in the 16-Mbyte modes. Figure 6-2 shows a general view of the

memory map.

Figure 6-2 Access Area Map for Modes 1 to 4

H'00000

H'1FFFF

H'20000

H'3FFFF

H'40000

H'5FFFF

H'60000

H'7FFFF

H'80000

H'9FFFF

H'A0000

H'BFFFF

H'C0000

H'DFFFF

H'E0000

H'000000

H'1FFFFF

H'200000

H'3FFFFF

H'400000

H'5FFFFF

H'600000

H'7FFFFF

H'800000

H'9FFFFF

H'A00000

H'BFFFFF

H'C00000

H'DFFFFF

H'E00000

Area 0 (128 kbytes)

Area 1 (128 kbytes)

Area 2 (128 kbytes)

Area 3 (128 kbytes)

Area 4 (128 kbytes)

Area 5 (128 kbytes)

Area 6 (128 kbytes)

Area 7 (128 kbytes)

On-chip RAM

External address space

On-chip registers

1, 2

Area 7 (2 Mbytes)

On-chip RAM

External address space

On-chip registers

1, 2

Area 0 (2 Mbytes)

Area 1 (2 Mbytes)

Area 2 (2 Mbytes)

Area 3 (2 Mbytes)

Area 4 (2 Mbytes)

Area 5 (2 Mbytes)

Area 6 (2 Mbytes)

a. 1-Mbyte modes (modes 1 and 2)

b. 16-Mbyte modes (modes 3 and 4)

Notes:

The on-chip RAM and on-chip registers have a fixed bus width and are accessed in a fixed

number of states.

When the RAME bit is cleared to 0 in SYSCR, this area conforms to the specifications of area 7.

The 12-byte external address space conforms to the specifications of area 7.

H'FFFFF

H'FFFFFF

109

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