H8SLASH3003 datasheet(123/715 Pages) RENESAS

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6.2.2 Access State Control Register (ASTCR)

ASTCR is an 8-bit readable/writable register that selects whether each area is accessed in two

states or three states.

ASTCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in

software standby mode.

Bits 7 to 0—Area 7 to 0 Access State Control (AST7 to AST0): These bits select whether the

corresponding area is accessed in two or three states.

Bits 7 to 0

AST7 to AST0

Description

Areas 7 to 0 are accessed in two states

Areas 7 to 0 are accessed in three states

(Initial value)

ASTCR specifies the number of states in which external areas are accessed. On-chip memory and

registers are accessed in a fixed number of states that does not depend on ASTCR settings.

Bit

Initial value

Read/Write

AST7

R/W

AST6

R/W

AST5

R/W

AST4

R/W

AST3

R/W

AST0

R/W

AST2

R/W

AST1

R/W

Bits selecting number of states for access to each area

105

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