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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3003 数据表(PDF) 225 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 225 Page - Renesas Technology Corp |
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225 / 715 page  Figure 8-8 Operation in Normal Mode Transfers can be requested (activated) by an external request or auto-request. An auto-requested transfer is activated by the register settings alone. The designated number of transfers are executed automatically. Either cycle-steal or burst mode can be selected. In cycle-steal mode the DMAC releases the bus temporarily after each transfer. In burst mode the DMAC keeps the bus until the transfers are completed, unless there is a bus request from a higher-priority bus master. For the detailed settings see section 8.3.4, Data Transfer Control Registers (DTCR). Address T Address B Transfer Legend L L N T B T B Address T Address B A B A A B B = initial setting of MARA = initial setting of MARB = initial setting of ETCRA = L = L + SAIDE • (–1) • (2 • N – 1) = L = L + DAIDE • (–1) • (2 • N – 1) A A B B DTSZ DTSZ A A B B SAID DAID 207 |
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