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H8/3003 数据表(PDF) 244 Page - Renesas Technology Corp |
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H8/3003 数据表(HTML) 244 Page - Renesas Technology Corp |
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244 / 715 page  8.4.11 NMI Interrupts and DMAC NMI interrupts do not affect DMAC operations in short address mode. If an NMI interrupt occurs during a transfer in full address mode, the DMAC suspends operations. In full address mode, a channel is enabled when its DTE and DTME bits are both set to 1. NMI input clears the DTME bit to 0. After transferring the current byte or word, the DMAC releases the bus to the CPU. In normal mode, the suspended transfer resumes when the CPU sets the DTME bit to 1 again. Check that the DTE bit is set to 1 and the DTME bit is cleared to 0 before setting the DTME bit to 1. Figure 8-22 shows the procedure for resuming a DMA transfer in normal mode on channel 0 after the transfer was halted by NMI input. Figure 8-22 Procedure for Resuming a DMA Transfer Halted by NMI (Example) For information about NMI interrupts in block transfer mode, see section 8.6.6, NMI Interrupts and Block Transfer Mode. Resuming DMA transfer in normal mode DTE = 1 DTME = 0 Set DTME to 1 DMA transfer continues End 1. 2. Check that DTE = 1 and DTME = 0. Read DTCRB while DTME = 0, then write 1 in the DTME bit. 2 No Yes 226 |
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