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H8/3028F 数据表(PDF) 358 Page - Renesas Technology Corp

部件名 H8/3028F
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3028F 数据表(HTML) 358 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 328 of 890
Bit 4—Overflow Interrupt Enable 0 (OVIE0): Enables or disables the interrupt requested by the
OVF0 when OVF0 flag is set to 1.
Bit 4
OVIE0
Description
0
OVI0 interrupt requested by OVF0 flag is disabled
(Initial value)
1
OVI0 interrupt requested by OVF0 flag is enabled
Bit 3—Reserved: This bit cannot be modified and is always read as 1.
Bit 2—Overflow Flag 2 (OVF2): This status flag indicates 16TCNT2 overflow.
Bit 2
OVF2
Description
0
[Clearing condition]
(Initial value)
Read OVF2 flag when OVF2 =1, then write 0 in OVF2 flag
1
[Setting condition]
16TCNT2 overflowed from H'FFFF to H'0000, or underflowed from H'0000 to H'FFFF
Note: 16TCNT underflow occurs when 16TCNT operates as an up/down-counter. Underflow
occurs only when channel 2 operates in phase counting mode (MDF = 1 in TMDR).
Bit 1—Overflow Flag 1 (OVF1): This status flag indicates 16TCNT1 overflow.
Bit 1
OVF1
Description
0
[Clearing condition]
(Initial value)
Read OVF1 flag when OVF1 =1, then write 0 in OVF1 flag
1
[Setting condition]
16TCNT1 overflowed from H'FFFF to H'0000
Bit 0—Overflow Flag 0 (OVF0): This status flag indicates 16TCNT0 overflow.
Bit 0
OVF0
Description
0
[Clearing condition]
(Initial value)
Read OVF0 flag when OVF0 =1, then write 0 in OVF0 flag
1
[Setting condition]
16TCNT0 overflowed from H'FFFF to H'0000



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