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H8/3028F 数据表(PDF) 668 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 668 Page - Renesas Technology Corp |
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668 / 923 page ![]() Rev. 2.00, 09/03, page 638 of 890 Bit 1 MSTPH1 Description 0 SCI1 operates normally (Initial value) 1 SCI1 is in standby state Bit 0—Module Standby H0 (MSTPH0): Selects whether to place the SCI0 in standby. Bit 0 MSTPH0 Description 0 SCI0 operates normally (Initial value) 1 SCI0 is in standby state 20.2.3 Module Standby Control Register L (MSTCRL) MSTCRL is an 8-bit readable/writable register that controls the module standby function, which places individual on-chip supporting modules in the standby state. Module standby can be designated for the DMAC, 16-bit timer, DRAM interface, 8-bit timer, and A/D converter modules. 2 MSTPL2 0 R/W 1 — 0 R/W 0 MSTPL0 0 R/W Reserved bits Module standby L7, L5 to L2, L0 These bits select modules to be placed in standby Bit Initial value Read/Write 7 MSTPL7 0 R/W 6 — 0 R/W 5 MSTPL5 0 R/W 4 MSTPL4 0 R/W 3 MSTPL3 0 R/W MSTCRL is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit 7—Module Standby L7 (MSTPL7): Selects whether to place the DMAC in standby. Bit 7 MSTPL7 Description 0 DMAC operates normally (Initial value) 1 DMAC is in standby state |
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