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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 159 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 159 Page - Renesas Technology Corp |
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159 / 923 page  Rev. 2.00, 09/03, page 129 of 890 6.2.12 Address Control Register (ADRCR) ADRCR is an 8-bit readable/writable register that selects either address update mode 1 or address update mode 2 as the address output method. 7 — 1 — 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 2 — 1 — 1 — 1 R/W 0 ADRCTL 1 R/W Bit Initial value R/W Reserved bits Reserved bit Address control Selects address update mode 1 or address update mode 2 ADRCR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in software standby mode. Bits 7 to 2—Reserved: Read-only bits, always read as 1. Bit 1—Reserved: Can be read or written to, but must not be cleared to 0. Bit 0—Address Control (ADRCTL): Selects the address output method. Bit 0 ADRCTL Description 0 Address update mode 2 is selected 1 Address update mode 1 is selected (Initial value) |
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