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H8/3028F 数据表(PDF) 158 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 158 Page - Renesas Technology Corp |
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158 / 923 page ![]() Rev. 2.00, 09/03, page 128 of 890 6.2.10 Refresh Timer Counter (RTCNT) 0 Initial value 0000000 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W 76543210 Bit RTCNT is an 8-bit readable/writable up-counter. RTCNT is incremented by an internal clock selected by bits CKS2 to CKS0 in RTMCSR. When RTCNT matches RTCOR (compare match), the CMF flag in RTMCSR is set to 1 and RTCNT is cleared to H'00. If the RCYCE bit in DRCRB is set to 1 at this time, a refresh cycle is started. Also, if the CMIE bit in RTMCSR is set to 1, a compare match interrupt (CMI) is generated. RTCNT is initialized to H'00 by a reset and in standby mode. 6.2.11 Refresh Time Constant Register (RTCOR) 1 Initial value 1111111 Read/Write R/W R/W R/W R/W R/W R/W R/W R/W 76543210 Bit RTCOR is an 8-bit readable/writable register that determines the interval at which RTCNT is cleared. RTCOR and RTCNT are constantly compared. When their values match, the CMF flag is set to 1 in RTMCSR, and RTCNT is simultaneously cleared to H'00. RTCOR is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in software standby mode. Note: Only byte access can be used on this register. |
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