H8SLASH3028F datasheet(251/923 Pages) RENESAS

251 / 923 page

Rev. 2.00, 09/03, page 221 of 890

Figure 7.9 shows a sample setup procedure for normal mode.

Set the initial source address in MARA.

Set the initial destination address in MARB.

Set the transfer count in ETCRA.

Set the DTCRB bits as follows.

Set the DTCRA bits as follows.

Read DTCRB with DTME cleared to 0.

Normal mode

Set initial source address

Set initial destination address

Set transfer count

Set DTCRB (1)

Set DTCRA (1)

Read DTCRB

Set DTCRB (2)

Read DTCRA

Set DTCRA (2)

•

Clear the DTME bit to 0.

Set the DAID and DAIDE bits to select whether

MARB is incremented, decremented, or held fixed.

Select the DMAC activation source with bits

DTS2B to DTS0B.

Clear the DTE bit to 0.

Select byte or word size with the DTSZ bit.

Set the SAID and SAIDE bits to select whether

MARA is incremented, decremented, or held fixed.

Set or clear the DTIE bit to enable or disable the

CPU interrupt at the end of the transfer.

Clear the DTS0A bit to 0 and set the DTS2A

and DTS1A bits to 1 to select normal mode.

Set the DTME bit to 1 in DTCRB.

Read DTCRA with DTE cleared to 0.

Set the DTE bit to 1 in DTCRA to enable the transfer.

Note: Carry out settings 1 to 9 with the DEND interrupt masked in the CPU.

If an NMI interrupt occurs during the setup procedure, it may clear the DTME bit to 0, in

which case the transfer will not start.

Figure 7.9 Normal Mode Setup Procedure (Example)

H8/3028F 数据表(PDF) 251 Page - Renesas Technology Corp

H8/3028F 数据表(HTML) 251 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载